This invention relates to semiconductor circuits, and more particularly to a CMOS circuit for detecting transitions in an address input.
In semiconductor dynamic read/write memory devices of the type disclosed in U.S. Pat. No. 4,239,993, issued to McAlexander, White, and Rao, for example, it is sometimes desirable to detect the transition of the address bits. When static column decode is employed, a change in the column address will produce a new data output; it is preferable, however, to have an internal indication that an address transition has occurred.
It is the principal object of this invention to provide an improved address transition detector circuit, as may be used in a dynamic read/write memory device, or the like. Another object is to provide a simplified, low-power, CMOS circuit for detecting the change in an address on the input terminal of a memory device.